ADC mining customer telephone

1. I know, in private

2. In the Ming Dynasty, Jia Zilong, a merchant of Chang'an, made friends with Gao Shizhen. Jia Zilong was enthusiastic about public welfare and was charitable. He often couldn't make ends meet, so he tried his best to raise money for profit, and often borrowed money from Zhensheng for lack of funds. Zhensheng advised him to live within his means and be content.

3. ADC, like computer, has experienced the development process from low speed to high speed. The low-speed (conversion time is more than 300US) structure of ADC includes integration type, slope type and tracking type; The medium speed (conversion time between 1US and 300US) structure of ADC has successive approximation type; The high speed (conversion time less than 1 US) structure of ADC includes scintillation type, partition type and high resolution structure of ∑ - △ type. These different structures meet the needs of the wide range and diversity of practical applications. Among them, high-speed ADC has become an important link to determine the performance of modern electronic equipment such as radar, communication, electronic countermeasures, aerospace, missile, measurement and control, ground exhibition, medical treatment, instrumentation, image, high-performance controller and digital communication system. Basic principle: the current high-speed ADC mainly adopts the following two structures. One is full parallel structure, also known as flash structure. The ADC with this structure has at least 2- One comparator, for example, an 8-bit ADC has at least 255 comparators. When the resolution of ADC increases, not only the circuit volume is huge, but also the power consumption increases sharply, and "spark code" is easy to appear, so it is generally used for ADC with low resolution, such as six bit and eight bit ADC. Another structure is called partition structure or folding structure, such as two-step and multi-step. Its circuit structure mainly includes s / h (or T / h) amplifier, flash a / D converter, time scale circuit and digital error correction circuit. Partition ADC overcomes the shortcomings of pure flash ADC, such as large circuit size and high power consumption with the increase of resolution, but it also brings another problem, that is, the differential amplifier and the circuit related to the input voltage of the second conversion processing

4. It's OK. I'm doing a welcome exchange